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19-1458; Rev 0; 1/00
SIM/Smart Card Level Translators in MAX
General Description
The MAX1740/MAX1741 subscriber identity module (SIM)/smart card level translators provide level shifting and electrostatic discharge (ESD) protection for SIM and smart card ports. These devices integrate two unidirectional level shifters for the reset and clock signals, a bidirectional level shifter for the serial data stream, and 10kV ESD protection on all card contacts. The MAX1740 includes a SHDN control input to aid insertion and removal of SIM and smart cards, while the MAX1741 includes a system-side data driver to support system controllers without open-drain outputs. The logic supply voltage range is +1.425V to +5.5V for the "controller side" and +2.25V to +5.5V for the "card side." Total supply current is 2.5A max. Both devices automatically shut down when either power supply is removed. For a complete SIM-card interface, combine the MAX1740/MAX1741 with the MAX1686H 0V/3V/5V regulated charge pump. The MAX1740/MAX1741 are available in ultra-small 10pin MAX packages that are only 1.09mm high and half the area of an 8-pin SO. The MAX1740/MAX1741 are compliant with GSM test specifications 11.11 and 11.12. o SIM/Smart Card Level Shifting o 10kV ESD Card Socket Protection o Allows Level Translation with DVCC VCC or DVCC VCC o Automatically Shuts Down When Either Supply Is Removed o Card Contacts Actively Pulled Low During Shutdown o +1.425V to +5.5V Controller Voltage Range o +2.25V to +5.5V Card Voltage Range o 2.5A (max) Total Quiescent Supply Current o 0.01A Total Shutdown Supply Current o Ultra-Small 10-Pin MAX Package o Compliant with GSM Test Specifications 11.11 and 11.12
Features
MAX1740/MAX1741
Applications
SIM Interface in GSM Cellular Telephones Smart Card Readers Logic Level Translation SPITM/QSPITM/MICROWIRETM Level Translation
PART MAX1740EUB MAX1741EUB
Ordering Information
TEMP. RANGE -40C to +85C -40C to +85C PIN-PACKAGE 10 MAX 10 MAX
Typical Operating Circuit
DVCC DVCC DVCC RIN SYSTEM CONTROLLER VCC RST VCC VCC RST SIM OR SMART CARD
Pin Configuration
TOP VIEW
DATA DVCC CIN RIN SHDN (DDRV) 1 2 3 4 5 10 IO 9 VCC CLK RST GND
MAX1740 MAX1741
CIN DATA OPTIONAL OPTIONAL SHDN* DDRV* IO GND IO CLK CLK
MAX1740 MAX1741
8 7 6
MAX
( ) ARE FOR MAX1741.
GND
GND * SHDN FOR MAX1740 ONLY DDRV FOR MAX1741 ONLY
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. 1
________________________________________________________________ Maxim Integrated Products
For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800. For small orders, phone 1-800-835-8769.
SIM/Smart Card Level Translators in MAX MAX1740/MAX1741
ABSOLUTE MAXIMUM RATINGS
DVCC, VCC to GND................................................-0.3V to +6.0V RIN, CIN, DATA, DDRV, SHDN to GND ......................................-0.3V to (DVCC + 0.3V) RST, CLK, IO to GND ................................-0.3V to (VCC + 0.3V) Continuous Power Dissipation (TA = +70C) 10-Pin MAX (derate 5.6mW/C above +70C) ..........444mW Operating Temperature Range ..........................-40C to +85C Storage Temperature Range ............................-65C to +150C Junction Temperature ......................................................+150C Lead Temperature (soldering, 10s) ................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Figure 1, DVCC = +1.8V, VCC = +3.0V or +5.0V, SHDN = DVCC, CIN = RIN = GND or DVCC, IO = VCC, DATA = DDRV = DVCC, CIO = CCLK = CRST = CDATA = 30pF, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER POWER SUPPLIES DVCC Operating Range VCC Operating Range DVCC VCC CIN static DVCC Operating Current IDVCC CIN clocked at 1.625MHz from GND to DVCC with 50% duty cycle CIN clocked at 3.25MHz from GND to DVCC with 50% duty cycle CIN static VCC Operating Current IVCC CIN clocked at 1.625MHz from GND to DVCC with 50% duty cycle CIN clocked at 3.25MHz from GND to DVCC with 50% duty cycle Total Shutdown Current ISHDN IOFF = IVCC + IDVCC, SHDN = GND (MAX1740 only), or DVCC = GND or VCC = GND 0.2 * DVCC 0.7 * DVCC 0.01 VOL VOH ISINK = 200A ISOURCE = 20A ISOURCE = 200A Between DATA and DVCC (Note 1) (Note 2) VCC = 5.0V 0.9 * VCC 0.8 * VCC 13 0.3 DVCC - 0.6 1 2 20 28 1 0.4 0.5 mA 1 8 16 1.5 A 1.425 2.25 5.5 5.5 1 A V V SYMBOL CONDITIONS MIN TYP MAX UNITS
0.01
2
A
CIN, RIN, SHDN, DDRV LOGIC INPUTS Digital Input Low Threshold Digital Input High Threshold Input Leakage Current CLK, RST OUTPUTS Digital Output Low Level Digital Output High Level DATA INPUT/OUTPUT DATA Pull-Up Resistance Input Low Threshold Input High Threshold Input Low Current Input High Current 2 RDATA VIL(DATA) VIH(DATA) IIL IIH k V V mA A V V VIL VIH V V A
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SIM/Smart Card Level Translators in MAX
ELECTRICAL CHARACTERISTICS (continued)
(Figure 1, DVCC = +1.8V, VCC = +3.0V or +5.0V, SHDN = DVCC, CIN = RIN = GND or DVCC, IO = VCC, DATA = DDRV = DVCC, CIO = CCLK = CRST = CDATA = 30pF, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Output Low Level Output High Level IO INPUT/OUTPUT IO Pull-Up Resistance Input Low Threshold Input High Threshold Input Low Current Input High Current Output Low Level Output High Level SHUTDOWN OUTPUT LEVELS ISINK = 200A, SHDN = GND, DATA = CIN = RIN = DVCC (MAX1740 only) Shutdown Output Levels (IO, CLK, RST) ISINK = 200A, DVCC = GND, SHDN (MAX1740) = DDRV (MAX1741) = DATA = CIN = RIN = DVCC ISINK = 200A, VCC = GND, SHDN (MAX1740) = DDRV (MAX1741) = DATA = CIN = RIN = DVCC TIMING DVCC = 2.7V VCC = 2.7V to 5.5V Maximum CLK Frequency (Notes 3, 4) fCLK VCC = 2.25V to 3.6V DVCC = 2.25V DVCC = 1.7V DVCC = 1.425V DVCC = 2.25V DVCC = 1.7V DVCC = 1.425V 5 5 5 3.5 4 4 3.5 MHz 0.4 V RIO VIL(IO) VIH(IO) IIL IIH VOL(IO) VOH(IO) DATA = GND or DDRV = GND, ISINK = 200A ISOURCE = 20A 0.8 * VCC Between IO and VCC IIL(MAX) = 1mA (Note 1) IIH(MAX) = 20A (Note 2) 6.5 0.3 0.7 * VCC 1 20 0.4 10 14 k V V mA A V V SYMBOL VOL(DATA) VOH(DATA) CONDITIONS IO = GND, ISINK = 100A DVCC = 3.0V, IO = GND, ISINK = 200A ISOURCE = 10A DVCC = 3.0V, ISOURCE = 20A 0.7 * DVCC 0.7 * DVCC MIN TYP MAX 0.4 0.4 UNITS V V V V
MAX1740/MAX1741
0.4
V
0.4
V
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3
SIM/Smart Card Level Translators in MAX MAX1740/MAX1741
ELECTRICAL CHARACTERISTICS
(Figure 1, DVCC = +1.8V, VCC = +3.0V or +5.0V, SHDN = DVCC, CIN = RIN = GND or DVCC, IO = VCC, DATA = DDRV = DVCC, CIO = CCLK = CRST = CDATA = 30pF, TA = -40C to +85C, unless otherwise noted.) (Note 5) PARAMETER POWER SUPPLIES DVCC Operating Range VCC Operating Range DVCC Operating Current VCC Operating Current Total Shutdown Current DVCC VCC IDVCC IVCC IOFF CIN static CIN static IOFF = IVCC + IDVCC, SHDN = GND (MAX1740 only), or DVCC = GND or VCC = GND 0.2 * DVCC 0.75 * DVCC 1 VOL VOH ISINK = 200A ISOURCE = 20A ISOURCE = 200A Between DATA and DVCC (Note 1) (Note 2) VCC = 5.0V IO = GND, ISINK = 100A DVCC = 3.0V, IO = GND, ISINK = 200A ISOURCE = 10A DVCC = 3.0V, ISOURCE = 20A Between IO and VCC IIL(MAX) = 1mA (Note 1) IIH(MAX) = 20A (Note 2) 0.7 * DVCC 0.7 * DVCC 6.5 0.3 0.7 * VCC 1 20 DATA = GND or DDRV = GND, ISINK = 200A ISOURCE = 20A 0.8 * VCC 0.4 14 0.9 * VCC 0.8 * VCC 13 0.3 DVCC - 0.6 1 2 0.4 0.4 28 0.4 1.425 2.25 5.5 5.5 1 1.5 2 V V A A A SYMBOL CONDITIONS MIN MAX UNITS
CIN, RIN, SHDN, DDRV LOGIC INPUTS Digital Input Low Threshold Digital Input High Threshold Input Leakage Current CLK, RST OUTPUTS Digital Output Low Level Digital Output High Level DATA INPUT/OUTPUT DATA Pull-Up Resistance Input Low Threshold Input High Threshold Input Low Current Input High Current Output Low Level Output High Level IO INPUT/OUTPUT IO Pull-Up Resistance Input Low Threshold Input High Threshold Input Low Current Input High Current Output Low Level Output High Level RIO VIL(IO) VIH(IO) IIL IIH VOL(IO) VOH(IO) k V V mA A V V RDATA VIL(DATA) VIH(DATA) IIL IIH VOL(DATA) VOH(DATA) k V V mA A V V V V V V VIL VIH V V A
4
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SIM/Smart Card Level Translators in MAX
ELECTRICAL CHARACTERISTICS (continued)
(Figure 1, DVCC = +1.8V, VCC = +3.0V or +5.0V, SHDN = DVCC, CIN = RIN = GND or DVCC, IO = VCC, DATA = DDRV = DVCC, CIO = CCLK = CRST = CDATA = 30pF, TA = -40C to +85C, unless otherwise noted.) (Note 5) PARAMETER SHUTDOWN OUTPUT LEVELS ISINK = 200A, SHDN = GND, DATA = CIN = RIN = DVCC (MAX1740 only) Shutdown Output Levels (IO, CLK, RST) ISINK = 200A, DVCC = GND, SHDN (MAX1740) = DDRV (MAX1741) = DATA = CIN = RIN = DVCC ISINK = 200A, VCC = GND, SHDN (MAX1740) = DDRV (MAX1741) = DATA = CIN = RIN = DVCC TIMING DVCC = 2.7V VCC = 2.7V to 5.5V Maximum CLK Frequency (Notes 3, 4) fCLK VCC = 2.25V to 3.6V DVCC = 2.25V DVCC = 1.7V DVCC = 1.425V DVCC = 2.25V DVCC = 1.7V DVCC = 1.425V Note 1: Note 2: Note 3: Note 4: 5 5 5 3.5 4 4 3.5 MHz 0.4 V SYMBOL CONDITIONS MIN MAX UNITS
MAX1740/MAX1741
0.4
V
0.4
V
VIL is defined as the voltage at which the output (DATA/IO) voltage equals 0.5V. VIH is defined as the voltage at which the output (DATA/IO) voltage exceeds the input (IO/DATA) voltage by 100mV. Timing specifications are guaranteed by design, not production tested. The maximum CLK frequency is defined as the output duty cycle remaining in the 40% to 60% range when the 50% CIN is applied. CIN has 5ns rise and fall times; levels are GND to DVCC. Input and output levels are measured at 50% of the waveform. Note 5: Specifications to -40C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 1, DVCC = 3.0V, VCC = 5.0V, DDRV or DATA = DVCC, RIN = CIN = GND, TA = +25C, unless otherwise noted.)
TOTAL OPERATING SUPPLY CURRENT vs. SUPPLY VOLTAGE (VCC)
MAX1740/1toc01
TOTAL OPERATING SUPPLY CURRENT vs. CLOCK FREQUENCY
MAX1740toc02
TOTAL OPERATING SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT, IVCC + IDVCC (mA) VDVCC = 3.0V, fIN = 3.25MHz, CIN CLOCKED WITH A 0 TO 3V SQUARE WAVE fDATA = fCIN/372 VVCC = 5.0V DATA OR DDRV = DVCC VVCC = 5.0V fDATA = fCIN/372 VVCC = 3.0V DATA OR DDRV = DVCC VVCC = 3.0V -40 -15 10 35 60 85
MAX1740toc03
1.8
SUPPLY CURRENT, IVCC + IDVCC (mA)
2.5 SUPPLY CURRENT, IVCC + IDVCC (mA)
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 2.0
fDATA = fCIN/372 VDVCC = 3.0V CIN CLOCKED WITH A fCIN = 3.25MHz 0 TO 3V SQUARE WAVE DATA OR DDRV = DVCC fCIN = 3.25MHz
2.0
VDVCC = 3.0V CIN CLOCKED WITH A 0 TO 3V SQUARE WAVE DATA OR DDRV = DVCC VVCC = 5.0V
1.7 1.5 1.3 1.1 0.9 0.7 0.5
fDATA OR fCIN/372 VVCC = 5.0V
1.5 fDATA OR fCIN/372 VVCC = 5.0V 1.0
0.5 DATA OR DDRV = DVCC VVCC = 5.0V 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 fCIN (MHz)
DATA OR DDRV = DVCC fCIN = 1.625MHz 2.5 3.0 3.5 4.0 VCC (V)
fDATA = fCIN/372 fCIN = 1.625MHz 4.5 5.0 5.5
0
TEMPERATURE (C)
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5
SIM/Smart Card Level Translators in MAX MAX1740/MAX1741
Typical Operating Characteristics (continued)
(Circuit of Figure 1, DVCC = 3.0V, VCC = 5.0V, DDRV or DATA = DVCC, RIN = CIN = GND, TA = +25C, unless otherwise noted.)
CIN TO CLK WAVEFORM
MAX1740/1toc04
RIN TO RST WAVEFORM
3V CIN 1V/div
MAX1740/1toc05
3V
RIN 1V/div
0 5V CLK 2V/div 0 fCIN = 3.25MHz 40ns/div
0 5V RST 2V/div 0 fRIN = 3.25MHz 40ns/div
UNDERVOLTAGE SHUTDOWN WAVEFORM
MAX1740/1toc08
DDRV TO IO AND DATA WAVEFORM (MAX1741 ONLY)
VCC 0.5V/div 3V 0 3V
MAX1740/1toc09
1.5V
DDRV 2V/div
0 1V CLK, RST, OR IO 0.5V/div
DATA 2V/div
0 5V IO 2V/div 0 1ms/div 1s/div
0
6
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SIM/Smart Card Level Translators in MAX
Pin Description
PIN NAME MAX1740 MAX1741 System Controller Data Input/Output. An open-drain input/output with a 20k pull-up resistor to DVCC. For bidirectional data transfer, connect to an open-drain controller output capable of sinking 1mA while pulling DATA low. If the controller is not open drain, use DDRV to send data and DATA to receive data. Supply Voltage for System Controller Digital Pins. Set at +1.425V to +5.5V. System Controller Clock Input System Controller Reset Input Optional System Controller Data Input. Connect to controllers without an open-drain output. When not used, connect DDRV to DVCC. Shutdown Mode Input. Driving SHDN low reduces the total supply current to less than 2A. In shutdown mode, RST, CLK, and IO are actively pulled low and the transfer gate between DATA and IO is disabled. When not used, connect SHDN to DVCC. System Controller and Card Ground Reset Output to Card. Actively pulled low during shutdown. Clock Output to Card. Actively pulled low during shutdown. Supply Voltage for Card-Side Digital Pins. Set at +2.25V to +5.5V. Proper supply bypassing is required to meet 10kV ESD specifications. Card-Side Bidirectional Input/Output. An open-drain output with a 10k pull-up resistor to VCC. For bidirectional data transfer, connect to an open-drain card output capable of sinking 1mA while pulling IO low. Actively pulled low during shutdown. FUNCTION
MAX1740/MAX1741
1
1
DATA
2 3 4 --
2 3 4 5
DVCC CIN RIN DDRV
5 6 7 8 9
-- 6 7 8 9
SHDN GND RST CLK VCC
10
10
IO
Detailed Description
The MAX1740/MAX1741 provide the necessary level translation for interfacing with subscriber identity modules (SIMs) and smart cards in multivoltage systems. These devices operate with logic supply voltages between +1.425V and +5.5V on the controller side (DVCC) and between +2.25V and +5.5V on the card side (VCC). The total supply current (IDVCC + IVCC) is 2.5A (max) while operating in an idle state (see Electrical Characteristics). Figure 2 shows a typical application circuit and functional diagram.
MAX1740 MAX1741
+1.8V DVCC SHDN* RIN CIN DDRV* DATA 30pF VCC RST CLK IO 30pF GND 30pF 30pF
+3.0V OR +5.0V
Level Translation
The MAX1740/MAX1741 provide level translators for a clock input, a reset input, and a bidirectional data input/output. The clock and reset inputs (CIN and RIN) are level shifted from the controller-side supply rails (DVCC to GND) to the card-side supply rails (VCC to GND). When connected to an open-drain controller output, DATA and IO provide bidirectional level translation.
* SHDN FOR MAX1740 ONLY DDRV FOR MAX1741 ONLY NOTE: ALL CAPACITANCES INCLUDE CAPACITIVE LOADS OF TEST PROBES AND BOARD LAYOUT.
Figure 1. MAX1740/MAX1741 Test Circuit 7
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SIM/Smart Card Level Translators in MAX MAX1740/MAX1741
All level translation is valid for DVCC VCC or DVCC VCC. The MAX1740/MAX1741 contain internal pull-up resistors from DATA to the controller-side supply (DVCC) and from IO to the card-side supply (VCC). For push-pull controller outputs, see the Data Driver section for bidirectional data translation. est way to achieve this is by shutting down the MAX1686H or by driving SHDN (MAX1740 only) low. If specific sequencing is desired, pull IO low by driving either DATA or DDRV (MAX1741 only) low, and pull CLK and RST low by driving CIN and RIN low, respectively.
Data Driver (MAX1741 only)
When using a microcontroller (C) without an open-drain output, use the data driver (DDRV) input to send data to the SIM/smart card, while DATA provides the controllerside output for bidirectional data transfer. When not used, connect DDRV to DVCC to reduce total supply current.
ESD Protection
As with all Maxim devices, ESD-protection structures on all pins protect against electrostatic discharges (ESDs) encountered during handling and assembly. For further protection during card insertion and removal, the pins that connect to the card socket (CLK, RST, IO, VCC, and GND) provide protection against 10kV of ESD, according to the Human Body Model. The ESD structures withstand high ESD in all states: normal operation, shutdown, and power-down. After an ESD event, the MAX1740/MAX1741 continue working without latchup.
Shutdown Mode
For the MAX1740, drive SHDN low to activate shutdown. Connect SHDN to DVCC or drive high for normal operation. To allow for card insertion and removal, shutdown mode actively pulls CLK, RST, and IO low; it also disconnects the internal 10k pull-up resistor from VCC to prevent excessive current draw. Shutdown mode reduces the total supply current (I DVCC + I VCC ) to 0.01A.
ESD Test Conditions
ESD performance depends on a variety of conditions. Contact Maxim for a reliability report documenting test setup, test methodology, and test results.
SIM/Smart Card Insertion/Removal
The SIM/smart card specifications require that the card-side pins (V CC , CLK, RST, IO) be at ground potential prior to inserting the SIM/smart card. For applications using the MAX1686H (Figure 4), the easi-
Human Body Model
Figure 3a shows the Human Body Model, and Figure 3b shows the current waveform it generates when discharged into a low impedance. This model consists of a 100pF capacitor charged to the ESD voltage of inter-
DVCC DVCC 1F CLK DVCC RIN VCC RST
VCC VCC RST 1F
CIN SYSTEM CONTROLLER DATA
CLK SIM OR SMART CARD
20k
10k IO
IO
OPTIONAL
SHDN*
SHUTDOWN CONTROL
OPTIONAL
DDRV* GND
GND
MAX1740 MAX1741
GND
* SHDN FOR MAX1740 ONLY DDRV FOR MAX1741 ONLY
Figure 2. Typical Application Circuit and Functional Diagram 8 _______________________________________________________________________________________
SIM/Smart Card Level Translators in MAX MAX1740/MAX1741
RC 1M CHARGE-CURRENT LIMIT RESISTOR HIGHVOLTAGE DC SOURCE RD 1500 DISCHARGE RESISTANCE DEVICE UNDER TEST IP 100% 90% AMPERES Cs 100pF STORAGE CAPACITOR 36.8% 10% 0 0 tRL TIME tDL CURRENT WAVEFORM Ir PEAK-TO-PEAK RINGING (NOT DRAWN TO SCALE)
Figure 3a. Human Body ESD Test Model
+3.0V CXN DVCC CXP 3.0V OR 5.0V IN MAX1686 OUT
Figure 3b. Human Body Model Current Waveform
+5.0V
MAX1686H
DVCC
+3.3V IN OUT
3/5 SHDN
GND
PGND
MAX8867 MAX8860
SHDN SIM OR SMART CARD
SET PGND
SYSTEM CONTROLLER
MAX1740 MAX1741
DVCC RIN CIN DATA OPTIONAL OPTIONAL SHDN* DDRV* GND VCC RST CLK IO
SYSTEM CONTROLLER
VCC RST CLK IO OPTIONAL GND GND OPTIONAL
MAX1740 MAX1741
DVCC RIN CIN DATA SHDN* DDRV* GND VCC RST CLK IO
SPI/QSPI/ MICROWIRE SYSTEM VCC CS SCLK DOUT DIN GND
GND
* SHDN FOR MAX1740 ONLY DDRV FOR MAX1741 ONLY
* SHDN FOR MAX1740 ONLY DDRV FOR MAX1741 ONLY
Figure 4. Using MAX1740/MAX1741 and MAX1686/MAX1686H Charge Pump for SIM Card Applications
Figure 5. MAX1740/MAX1741 with SPI/QSPI/MICROWIRE Interfaces
est, which is then discharged into the test device through a 1.5k resistor.
SPI/QSPI/MICROWIRE Interface
The MAX1740/MAX1741 are also useful as 3V/5V level shifters in SPI, QSPI, and MICROWIRE applications (Figure 5). On the slave side, connect CLK to SCLK, RST to CS, and IO to DOUT and DIN. The unidirectional level shifters transfer chip select and clock signals to the slave device(s), while the bidirectional level shifter transfers data.
Applications Information
SIM/Smart Card Interface
To provide 5V when interfacing with a 5V SIM/smart card, 3V systems require a DC-DC converter. The MAX1686H +5V regulating charge pump for SIM cards provides 0V/3V/5V for full compatibility with SIM/smart card specifications. Figure 4 shows the charge pump for SIM card applications. Alternatively, the MAX619 generates a regulated 5V from input voltages as low as 2V.
___________________Chip Information
TRANSISTOR COUNT: 114
9
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SIM/Smart Card Level Translators in MAX MAX1740/MAX1741
________________________________________________________Package Information
10LUMAX.EPS
Note: The MAX1740/MAX1741 do not have an exposed pad.
10
______________________________________________________________________________________
SIM/Smart Card Level Translators in MAX MAX1740/MAX1741
NOTES
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11
SIM/Smart Card Level Translators in MAX MAX1740/MAX1741
NOTES
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2000 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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